rather satisfying when you get to make stuff symmetric though :D
avoiding oscillation in a two-stage LTC4370 design is remarkably challenging, in part because it's hard to tell which part of it starts the oscillation. on top of tuning the compensation circuit to the input capacitance of the FETs, I had to add a delayed enable on the output stage to keep it stable, which isn't something mentioned in the datasheet.
decoupling the two stages with a pi filter also helped a fair bit, since you don't end up with the two control loops fighting each other and reinforcing the oscillations.
interestingly they don't do this in the reference design from the appnote. I suspect they just ignore the scenario of under-damped output filters on power supplies, or hope that the dI/dt of load transients is small enough not to trigger oscillation. or maybe they just never tested it rigorously.
@gsuberland reference design? Tested rigorously? Hahahahahahahahahahahahahahahahahahahahaha!
@jpm yeah I was definitely rolling my eyes a bit while writing there haha